D16 Interface Design and Construction Notes.


General Considerations for All Modules


As I mentioned in the Design and Construction Notes for the D16/M itself, I have built the main memory and peripheral interfaces on Vector model 8803 S-100 prototyping boards.  Note, however, that the bus interface is actually quite different from S-100 and is totally incompatible (see D16_bus for details).  A D16/M peripheral module must never be inserted into an S-100 bus or vice-versa; the module *and* the bus may be seriously damaged!


D16/M interfaces operate directly on +5V  (+12V, -12V, and +3.3V are also available on the bus).  There is no on-board voltage regulation as in S-100.  Another difference is that the D16/M bus has lots of ground pins (21), where the S-100 bus had only 3! 


Each ground pin connects to the ground plane using 24 AWG bare tinned copper wire, for a low-impedance path.  The +5V supply is bypassed using three 10 µF tantalum capacitors, and there is a 0.1 µF ceramic capacitor between +5V and ground adjacent to each IC on the board.


External connections are made at the tops of the boards.  The interrupt daisy chain connection (present only on the Serial/Parallel Interface Module at this time) is also made across the tops of the boards, using the connectors at the extreme upper right.


D16/M peripherals may use a vectored-interrupt scheme similar to interrupt "mode 2" on the Zilog Z80 microprocessor.  A peripheral interrupts by pulling the /INT line low; the processor then responds with the signal /INT_ACK, which prompts the interrupting peripheral to enable a 16-bit interrupt vector (address) onto the data bus.  Interrupt priority is established by a "daisy chain," in which a low level on the /IEI (Interrupt Enable In) line of any module enables it to interrupt the system, and each module supplies an  /IEO (Interrupt Enable Out) signal to the /IEI input of the next  lower-priority module.  The /IEI input of the highest-priority module is simply grounded.


Interrupt priority among the separate peripherals on a multi-peripheral module must be handled by logic on the board itself.


The Main Memory/Bus Terminator Module


The D16/M main memory module is actually a part of the processor itself; not a peripheral, but since it is a separate unit that plugs into the system bus, we'll go ahead and discuss it here!


The RAM array (64K 16-bit words) consists of only four integrated circuits; type 43256 32K x 8-bit static RAM chips.  The ROM array (32K 16-bit words) consists of two 26C256 EPROMs.  The ROM array and the bottom 32K of the RAM array are co-incident in address space; the state of the bus /ROM_RAM line determines which actually appears in the lower 32K.


At present, Loren Blaney's and Rich Ottosen's "DMON" monitor resides in the ROM, and I use it to load and run application programs in the RAM at the upper 32K.


This module also contains the bus line termination resistors.  These should properly terminate each line in its characteristic impedance (around 100 ohms), but at present they are all set at 1k ohms and are really nothing more than simple pull-ups to the +3.3V rail.  The system functions reliably with the 1k resistors at 2 MHz, but I shall probably have to examine the line termination issue more carefully should I increase the bus speed in the future. 


There are no interrupts associated with this module, so it has no /IEI or /IEO connections.


The Serial/Parallel Interface Module


This module provides two EIA RS-232 compatible serial ports and two Centronics-compatible unidirectional parallel printer ports.


All of the I/O addresses on the module are fully decoded.  A DIP switch allows the module to reside at any of 256 base addresses (0000 through FF00).  The ports may be either polled or interrupt-driven.


All ports on the module are 8 bits wide, and are connected to bits 7-0 of the D16/M external data bus.


The two serial ports are identical in design.  I used Harris 6402 UART ICs because they are capable of operating at up to 800 kilobauds (although the RS-232 interface is actually much slower than that).  This capability might someday prove useful for some specialized application!  These UARTs are otherwise compatible with more conventional parts such as the General Instruments AY-5-1015.


There are jumpers which allow each serial port to be configured either as DTE (Data Terminal Equipment, transmitting on pin 2 and receiving on pin 3 of the EIA RS-232 connector) or as DCE (Data Communication Equipment, transmitting on Pin 3 and receiving on pin 2).  Ribbon cables connect the interface module to the EIA connectors (female 9-pin D) mounted on the rear panel of the computer.


Each serial port status may be read under program control, or interrupts may be generated on any of Transmit Register Empty, Transmit Buffer Register Empty, Data Received, Overrun Error, Framing Error, or Parity Error.  The port configurations (parity, number of stop bits, bits per character, and baud rate) are set using DIP switches and jumpers.  Available baud settings for each port are 75, 150, 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 76800, and 153600 using the 4.9152 MHz clock specified. 


The two parallel ports are identical.  The connectors on the rear panel of the computer are female 25-pin D; intended for use with Centronics-compatible printers through an IBM-compatible printer cable.  Port status may be read under program control, or interrupts may be generated on any of  /FAULT, PAPER_OUT, BUSY, or ACK.


I have deliberately kept these ports simple!   Except for the printer status lines, they go only one way.  There is an IEEE standard for enhanced bidirectional printer ports, but the specification is utterly Byzantine and I freely admit that I fled from it in terror…  I plan to build a more general-purpose bidirectional parallel interface, having multiple 16-bit ports, on another board.


Unfortunately the interrupt circuitry is a bit complex, and so it seemed appropriate to put at least some of it (the interrupt mask registers and associated gating) inside a small EPLD, an Altera EPM-7064.  There is a master board-level interrupt enable bit, and all interrupts on this particular module are of equal priority.  The interrupt vector address is set on DIP switches.


The SD Card Interface Module


The SD (Secure Digital) flash memory card, widely employed as a mass-storage device in digital cameras and other portable electronic products, seems almost miraculous.  It is scarcely larger than a postage stamp, yet even the least capacious of them (16 megabytes) has data capacity that is utterly gargantuan by traditional minicomputer standards (the DEC RK05 hard disk, for example, stored approximately 2.5 megabytes).


This module accepts up to four SD cards in on-board sockets; each of them may be thought of as a removable “disk pack.”  The module communicates with each card using a three-line “SPI” peripheral interface, either by means of a software-driven “bit-bang” approach (slower) or a hardware-driven shift register (faster).  It will also work with the older “MultiMediaCard” flash memory products, but these must be initialized at slow speed using the bit-bang interface before the faster shift register-based machine may be engaged.


Like the other D16 interfaces, this one is built on a Vector S-100 wire-wrap board.  Unfortunately, the SD cards are low-voltage devices and it was necessary to use voltage translator ICs to connect them to the rest of the circuit.  Since the translators were only available in SOIC packages, and because the sockets for the SD cards themselves are also intended to be surface-mounted, I put all of these parts on a small two-layer PC board that sits atop the wire-wrap board on insulating washers.


All of the I/O addresses on the module are fully decoded.  A DIP switch allows the module to reside at any of 256 base addresses (0000 through FF00).   All ports on the module are 8 bits wide, and are connected to bits 7-0 of the D16/M external data bus.  This module is not designed to be interrupt-driven.


Details of how to program the board are shown in the SD Controller Addresses/Commands list.  Software routines to read and write blocks (sectors) on the SD cards are included in the SDIO test program.




Here are some references that I found useful as I designed the D16/M interfaces.


Steve Leibson, Handbook of Microcomputer Interfacing.  Blue Ridge Summit, PA:  Tab Books (1983).


This older book has detailed descriptions and theories of operation for many specific interfaces, including the basic RS-232 serial and Centronics parallel ports. 


 John B. Peatman, Microcomputer-Based Design.  New York, NY:  McGraw-Hill (1977).


Dr. Peatman's book contains much discussion of interface design in general.


The Texas Instruments Engineering Staff, Design Considerations for Logic Products.  Owensville, MO:  Custom Printing Company (1997).


This "Application Book" contains highly technical discussions of issues such as bus line termination, power supply bypassing, and electromagnetic compatibility.  It also has descriptions of the input and output characteristics of each of the integrated logic IC families available when the book was written.


The SanDisk Secure Digital Card Product Manual, Version 1.9, Document No. 80-13-00169.  Sunnyvale, CA:  SanDisk Corporation (2003)


            SanDisk’s manual discusses the SD flash memory card, its interfaces, and its protocols in detail.